Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Bedienungsanleitung PDF herunterladen (Seite 92)

Signal Name Direction Description

tx_in_zero_tcp Input New signal in 14.1 release. The TX client asserts this signal during

a TX SOP cycle to tell the IP core to zero the TCP checksum in the

current packet.

A zeroed TCP checksum indicates the checksum value is not

necessarily correct. This information is useful when the correct

TCP checksum has not yet been recalculated after the packet is

modified.

tx_in_tcp_

offset[15:0]

Input Indicates the byte offset of the TCP checksum in the current

packet. The TX client must ensure this signal has a valid value

during each TX SOP cycle when it also asserts the tx_in_zero_

tcp signal. Holds the byte offset of the two bytes in the packet that

the IP core should reset.

The TX client must ensure that the TCP checksum bytes and the

timestamp bytes in the packet do not overlap. The IP core does

not check for overlap. If these two fields overlap, the results are

undefined.

ptp_pkt_out

Output Indicates the current frame on the TX Ethernet interface is a 1588

PTP packet. The IP core asserts this signal for a single clk_txmac

clock cycle when the frame begins transmission on the Ethernet

link.

tod_tx_clk_

st2[95:0]

Output Provides the timestamp when a 1588 PTP frame begins transmis‐

sion on the Ethernet link. Value is valid when the ptp_pkt_out

signal is asserted. This signal is meaningful only in two-step clock

mode.

rx_tod[95:0]

Output Whether or not the current packet on the RX client interface is a

1588 PTP packet, indicates the timestamp when the IP core

received the packet on the Ethernet link. The IP core provides a

valid value on this signal in the same cycle it asserts the RX SOP

signal for 1588 PTP packets.

PTP Timestamp Formats

The Low Latency 40-100GbE IP core supports a 96-bit timestamp (V2 format) or a 64-bit timestamp (V1

format), depending on the value of the ptp_v2 field of the TX_PTP_STATUS register. If the IP core supports

a the V1 format, the IP core completes all processing in the V2 format and then outputs the appropriate

64 bits as the timestamp.

The IP core maintains the time-of-day (TOD) in V2 format:

• Bits [95:48]: Seconds (48 bits).

• Bits [47:16]: Nanoseconds (32 bits). This field overflows at 1 billion.

• Bits [15:0]: Fractions of nanosecond (16 bits). This field is a true fraction; it overflows at 0xFFFF.

The IP core expects to receive timestamps from the TOD module in V2 format.

UG-01172

2015.05.04

PTP Timestamp Formats

3-47

Functional Description

Altera Corporation

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