Altera Low Latency 40-Gbps Ethernet MAC and PHY MegaCore Bedienungsanleitung PDF herunterladen (Seite 168)

Word Addr Bit R/W Name Description

0x4C5 15:0 RW User Next page low The Auto Negotiation TX state machine uses these

bits if the AN Next Page control bit is set. The

following bits are defined:

• [15]: next page bit

• [14]: ACK controlled by the state machine

• [13]: Message Page (MP) bit

• [12]: ACK2 bit

• [11]: Toggle bit

For more information, refer to Clause 73.7.7.1

Next Page encodings of IEEE 802.3ap-2007. Bit 49,

the PRBS bit, is generated by the Auto-Negotiation

TX state machine.

0x4C6

31:0 RW User Next page high The Auto Negotiation TX state machine uses these

bits if the Auto Negotiation next pages ctrl bit is

set. Bits [31:0] correspond to page bits [47:16]. Bit

49, the PRBS bit, is generated by the Auto Negotia‐

tion TX state machine.

0x4C7 15:0 RO LP base page low The AN RX state machine received these bits from

the link partner. The following bits are defined:

• [15] Next page bit

• [14] ACK which is controlled by the state

machine

• [13] RF bit

• [12:10] Pause bits

• [9:5] Echoed Nonce which are set by the state

machine

• [4:0] Selector

0x4C8 31:0 RO LP base page high The AN RX state machine received these bits from

the link partner. The following bits are defined:

• [31:30]: Reserved

• [29:5]: Correspond to page bits [45:21] which

are the technology ability

• [4:0]: Correspond to bits [20:16] which are TX

Nonce bits

UG-01172

2015.05.04

10GBASE-KR PHY Register Definitions

B-9

Arria 10 10GBASE-KR Registers

Altera Corporation

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