Altera Avalon Verification IP Suite Bedienungsanleitung PDF herunterladen (Seite 36)

get_response_latency()

int get_response_latency(int index)Prototype:

Verilog HDL: index

VHDL: response_data, index, bfm_id, req_if(bfm_id)

Arguments:

bitReturns:

Returns the transaction read latency in the response descriptor that has been

removed from the response queue. Each cycle in a burst read has its own latency

entry.

Description:

Verilog HDL, VHDLLanguage support:

get_response_queue_size()

int get_response_queue_size()Prototype:

Verilog HDL: None

VHDL: response_queue_size, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Queries the response queue to determine number of response descriptors currently

stored in the BFM. This is the number of responses the test program can

immediately remove from the response queue for further processing.

Description:

Verilog HDL, VHDLLanguage support:

get_response_read_id()

[AV_TRANSACTIONID_W-1:0] get_response_read_id()Prototype:

Verilog HDL: None

VHDL: response_read_id, bfm_id, req_if(bfm_id)

Arguments:

AvalonTransactionId_tReturns:

Returns the read id of the transaction in the response descriptor that has been

removed from the response queue.

Description:

Verilog HDL, VHDLLanguage support:

Avalon-MM Master BFM

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Altera Avalon Verification IP Suite Bedienungsanleitung Seite 36