Altera Avalon Verification IP Suite Bedienungsanleitung PDF herunterladen (Seite 131)

event_sink_ready_assert()

event_sink_ready_assert()Prototype:

Verilog HDL: N.A.

VHDL: bfm_id

Arguments:

voidReturns:

Signals that the ready signal was asserted.Description:

VHDLLanguage support:

event_sink_ready_deassert()

event_sink_ready_deassert()Prototype:

Verilog HDL: N.A.

VHDL: bfm_id

Arguments:

voidReturns:

Signals that the ready signal was deasserted.Description:

VHDLLanguage support:

get_transaction_channel()

get_transaction_channel()Prototype:

Verilog HDL: None

VHDL: channel, bfm_id, req_if(bfm_id)

Arguments:

STChannel_tReturns:

Returns the channel identifier for the most recently removed transaction.Description:

Verilog HDL, VHDLLanguage support:

get_transaction_data()

get_transaction_data()Prototype:

Verilog HDL: None

VHDL: data, bfm_id, req_if(bfm_id)

Arguments:

STData_tReturns:

Returns the data in the most recently removed transaction.Description:

Verilog HDL, VHDLLanguage support:

Altera Corporation

Avalon-ST Sink BFM

Send Feedback

9-5

event_sink_ready_assert()

1 2 ... 126 127 128 129 130 131 132 133 134 135 136 ... 223 224

Keine Kommentare

Altera Avalon Verification IP Suite Bedienungsanleitung Seite 131