Altera Avalon Verification IP Suite Bedienungsanleitung PDF herunterladen (Seite 100)

get_command_data()

bit [AV_DATA_W-1:0] get_command_data(int index)Prototype:

Verilog HDL: index

VHDL: command_data, index, bfm_id, req_if(bfm_id)

Arguments:

bit[AV_DATA_W-1:0]Returns:

Queries the received command descriptor for the transaction write data. For

burst commands with burst count greater than 1, the index selects the write

data cycle.

Description:

Verilog HDL, VHDLLanguage support:

get_command_debugaccess()

bit get_command_debugaccess()Prototype:

Verilog HDL: None

VHDL: command_debugaccess, bfm_id, req_if(bfm_id)

Arguments:

bitReturns:

Queries the received command descriptor for the transaction debug access.Description:

Verilog HDL, VHDLLanguage support:

get_command_issued_queue_size()

int get_command_issued_queue_size()Prototype:

Verilog HDL: None

VHDL: command_issued_queue_size, bfm_id, req_if(bfm_id)

Arguments:

intReturns:

Queries the command issued queue to determine number of pending

commands.

Description:

Verilog HDL, VHDLLanguage support:

Avalon-MM Monitor

Altera Corporation

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get_command_data()

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Altera Avalon Verification IP Suite Bedienungsanleitung Seite 100