Altera Avalon Verification IP Suite Bedienungsanleitung PDF herunterladen (Seite 200)

set_instruction_a()

void set_instruction_a()Prototype:

Verilog HDL: ci_addr_t address

VHDL: ci_addr_t address, bfm_id, req_if(bfm_id)

Arguments:

voidReturns:

Sets the instruction register file address a value.Description:

Verilog HDL, VHDLLanguage support:

set_instruction_b()

void set_instruction_b()Prototype:

Verilog HDL: ci_addr_t address

VHDL: ci_addr_t address, bfm_id, req_if(bfm_id)

Arguments:

voidReturns:

Sets the instruction register file address b value.Description:

Verilog HDL, VHDLLanguage support:

set_instruction_c()

void set_instruction_c()Prototype:

Verilog HDL: ci_addr_t address

VHDL: ci_addr_t address, bfm_id, req_if(bfm_id)

Arguments:

voidReturns:

Sets the instruction register file address c value.Description:

Verilog HDL, VHDLLanguage support:

set_instruction_timeout()

void set_instruction_timeout()Prototype:

Verilog HDL: int timeout

VHDL: int timeout, bfm_id, req_if(bfm_id)

Arguments:

voidReturns:

Sets the timeout value for an instruction. Set the value to 0 to disable timeouts.Description:

Verilog HDL, VHDLLanguage support:

Nios II Custom Instruction Slave BFM

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set_instruction_a()

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Altera Avalon Verification IP Suite Bedienungsanleitung Seite 200