Altera Avalon Verification IP Suite Bedienungsanleitung PDF herunterladen (Seite 199)

retrieve_instruction()

void retrieve_instruction.Prototype:

VHDL:

output ci_data_t dataa

Verilog HDL:

output ci_data_t dataa

Arguments:

output ci_data_t databoutput ci_data_t datab

output ci_n_t noutput ci_n_t n

output ci_addr_t aoutput ci_addr_t a

output ci_addr_t boutput ci_addr_t b

output ci_addr_t coutput ci_addr_t c

output logic readraoutput logic readra

output logic readrboutput logic readrb

output logic writercoutput logic writerc

output ci_data_t idleoutput ci_data_t idle

bfm_id

req_if(bfm_id)

voidReturns:

A simplified API to retrieve instruction.Description:

Verilog HDL, VHDLLanguage support:

set_clock_enable_timeout()

void set_clock_enable_timeout()Prototype:

Verilog HDL: int timeout

VHDL: int timeout, bfm_id, req_if(bfm_id)

Arguments:

voidReturns:

Sets the timeout value for the clock enable. Set the value to 0 to disable timeout.Description:

Verilog HDL, VHDLLanguage support:

Altera Corporation

Nios II Custom Instruction Slave BFM

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retrieve_instruction()

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Altera Avalon Verification IP Suite Bedienungsanleitung Seite 199