
A–8 Altera Corporation
HardCopy II Clock Uncertainty Calculator User Guide
Inter-Clock Domain with PLL
Figure A–8 shows an example of a clock-pair = CLK7 to CLK11
Figure A–8. Inter-Clock Domain with Two Independent Clocks and a PLL on the Source Clock
Table A–8 shows input of the PLL index for Figure A–8, with respect to
the source and destination clocks.
INBUF4
INBUF6
CLK7
CLK11
Source
Clock
Destination
Clock
Source
Regist
Destination
Register
PLL12
Table A–8. Location of Input PLLs
Source Clock Destination Clock
1st PLL 2nd PLL 1st PLL 2nd PLL
12 — 0 —
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