Altera Interlaken MegaCore Function Bedienungsanleitung

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101 Innovation Drive
San Jose, CA 95134
www.altera.com
UG-01092-1.3
User Guide
Interlaken MegaCore Function
Document last updated for Altera Complete Design Suite version:
Document publication date:
12.0
June 2012
Feedback Subscribe
Interlaken MegaCore Function User Guide
c The Interlaken MegaCore function is scheduled for product
obsolescence and discontinued support as described in
PDN1410. Therefore, Altera does not recommend use of this IP
in new designs. For more information about Altera’s current IP
offering, refer to Altera’s Intellectual Property website.
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Inhaltsverzeichnis

Seite 1 - Interlaken MegaCore Function

101 Innovation DriveSan Jose, CA 95134www.altera.com UG-01092-1.3 User GuideInterlaken MegaCore FunctionDocument last updated for Altera Complete Desi

Seite 2

1–4 Chapter 1: About This MegaCore FunctionRelease InformationInterlaken MegaCore Function June 2012 Altera CorporationUser GuideFor all Interlaken Me

Seite 3 - Contents

Chapter 1: About This MegaCore Function 1–5Installation and LicensingJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFigure 1–2 sho

Seite 4 - Chapter 5. Signals

1–6 Chapter 1: About This MegaCore FunctionInstallation and LicensingInterlaken MegaCore Function June 2012 Altera CorporationUser GuideOpenCore Evalu

Seite 5 - Contents v

June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide2. Getting StartedDesign Flows1 You can customize the Interlaken MegaCore function

Seite 6

2–2 Chapter 2: Getting StartedDesign FlowsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideFigure 2–1 shows the stages for creating

Seite 7 - Features

Chapter 2: Getting Started 2–3MegaWizard Plug-in Manager Design FlowJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideMegaWizard Plug

Seite 8 - Device Family Support

2–4 Chapter 2: Getting StartedQsys Design FlowInterlaken MegaCore Function June 2012 Altera CorporationUser GuideYou cannot simulate the Interlaken Me

Seite 9 - MegaCore Verification

Chapter 2: Getting Started 2–5Qsys Design FlowJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFigure 2–2 shows a block diagram of a

Seite 10 - Installation and Licensing

2–6 Chapter 2: Getting StartedQsys Design FlowInterlaken MegaCore Function June 2012 Altera CorporationUser Guide6. Click Finish to complete the Inter

Seite 11

Chapter 2: Getting Started 2–7Specifying ConstraintsJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideSpecifying ConstraintsAltera pr

Seite 12 - OpenCore Evaluation

© 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logosare trademar

Seite 13 - 2. Getting Started

2–8 Chapter 2: Getting StartedSpecifying ConstraintsInterlaken MegaCore Function June 2012 Altera CorporationUser Guide3. On the Assignments menu, cli

Seite 14 - Qsys Design Flow Summary

Chapter 2: Getting Started 2–9Compiling the Full Design and Programming the FPGAJune 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide2.

Seite 15

2–10 Chapter 2: Getting StartedCompiling the Full Design and Programming the FPGAInterlaken MegaCore Function June 2012 Altera CorporationUser Guide

Seite 16 - Qsys Design Flow

June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide3. Parameter SettingsCustomize the Interlaken MegaCore function by specifying param

Seite 17 - Specifying Parameters

3–2 Chapter 3: Parameter SettingsGeneral ParametersInterlaken MegaCore Function June 2012 Altera CorporationUser GuideThe Interlaken MegaCore function

Seite 18 - Simulating the System

Chapter 3: Parameter Settings 3–3In-Band Flow Control ParametersJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideIf this parameter i

Seite 19 - Specifying Constraints

3–4 Chapter 3: Parameter SettingsBurst ParametersInterlaken MegaCore Function June 2012 Altera CorporationUser GuideEnable Dynamic Configuration of Bu

Seite 20 - I/O Standard Constraints

June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide4. Functional DescriptionThe Interlaken MegaCore function provides the functionalit

Seite 21

4–2 Chapter 4: Functional DescriptionArchitecture OverviewInterlaken MegaCore Function June 2012 Altera CorporationUser GuideArchitecture OverviewFigu

Seite 22

Chapter 4: Functional Description 4–3Interfaces OverviewJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideThe Interlaken MegaCore fun

Seite 23 - 3. Parameter Settings

June 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideContentsChapter 1. About This MegaCore FunctionFeatures . . . . . . . . . . . . . .

Seite 24 - Exclude Transceiver

4–4 Chapter 4: Functional DescriptionInterfaces OverviewInterlaken MegaCore Function June 2012 Altera CorporationUser GuideIf you turn on the Exclude

Seite 25 - Burst Parameters

Chapter 4: Functional Description 4–5Clocking and Reset StructureJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideClocking and Reset

Seite 26

4–6 Chapter 4: Functional DescriptionClocking and Reset StructureInterlaken MegaCore Function June 2012 Altera CorporationUser GuideOut-of-Band Flow C

Seite 27 - 4. Functional Description

Chapter 4: Functional Description 4–7Clocking and Reset StructureJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFigure 4–3 shows t

Seite 28 - Interfaces Overview

4–8 Chapter 4: Functional DescriptionClocking and Reset StructureInterlaken MegaCore Function June 2012 Altera CorporationUser GuideFigure 4–5 shows t

Seite 29 - Note to Table 4–1:

Chapter 4: Functional Description 4–9Clocking and Reset StructureJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFigure 4–6 shows t

Seite 30 - Avalon-ST Interface

4–10 Chapter 4: Functional DescriptionClocking and Reset StructureInterlaken MegaCore Function June 2012 Altera CorporationUser GuideThe MAC block mus

Seite 31 - Clocking and Reset Structure

Chapter 4: Functional Description 4–11Transmit PathJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFor more information about the t

Seite 32

4–12 Chapter 4: Functional DescriptionTransmit PathInterlaken MegaCore Function June 2012 Altera CorporationUser GuideArbiterThe channel arbiter arbit

Seite 33

Chapter 4: Functional Description 4–13Transmit PathJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideIn addition to incoming data, th

Seite 34

iv ContentsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideAvalon-ST Interface . . . . . . . . . . . . . . . . . . . . . . . . . .

Seite 35 - MAC Clock Verified Frequency

4–14 Chapter 4: Functional DescriptionTransmit PathInterlaken MegaCore Function June 2012 Altera CorporationUser GuideMegaCore function to insert idle

Seite 36 - PCS Clock Frequencies

Chapter 4: Functional Description 4–15Transmit PathJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFigure 4–9 shows non-optimal uti

Seite 37 - Transmit Path

4–16 Chapter 4: Functional DescriptionTransmit PathInterlaken MegaCore Function June 2012 Altera CorporationUser GuideTX MACThe Interlaken MegaCore fu

Seite 38

Chapter 4: Functional Description 4–17Receive PathJune 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide Performs 64/67 encoding. The in

Seite 39

4–18 Chapter 4: Functional DescriptionReceive PathInterlaken MegaCore Function June 2012 Altera CorporationUser GuideFigure 4–13 shows the flow throug

Seite 40

Chapter 4: Functional Description 4–19Receive PathJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideChannel Filtering BlocksEach chan

Seite 41

4–20 Chapter 4: Functional DescriptionCalendar and Status BlockInterlaken MegaCore Function June 2012 Altera CorporationUser GuideThe packet regrouper

Seite 42

Chapter 4: Functional Description 4–21Calendar and Status BlockJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFigure 4–16 shows th

Seite 43 - Receive Path

4–22 Chapter 4: Functional DescriptionHigh-Speed I/O BlockInterlaken MegaCore Function June 2012 Altera CorporationUser GuideThe calendar and status b

Seite 44

Chapter 4: Functional Description 4–23High-Speed I/O BlockJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideFIFO Buffers and Pipeline

Seite 45 - Packet Regrouper

Contents vJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideChapter 6. Qsys Design ExamplesDesign Examples Overview . . . . . . . . .

Seite 46 - Calendar and Status Block

4–24 Chapter 4: Functional DescriptionOut-of-Band Flow Control BlockInterlaken MegaCore Function June 2012 Altera CorporationUser GuideThe 12-lane, 10

Seite 47 - Lane Status Block

Chapter 4: Functional Description 4–25Out-of-Band Flow Control BlockJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideTX Out-of-Band

Seite 48 - High-Speed I/O Block

4–26 Chapter 4: Functional DescriptionOut-of-Band Flow Control BlockInterlaken MegaCore Function June 2012 Altera CorporationUser Guide

Seite 49 - Transceivers

June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide5. SignalsThis chapter describes the Interlaken MegaCore function signals. 1 Qsys a

Seite 50

5–2 Chapter 5: SignalsInterlaken Interface and External Transceiver Interface SignalsInterlaken MegaCore Function June 2012 Altera CorporationUser Gui

Seite 51

Chapter 5: Signals 5–3Interlaken Interface and External Transceiver Interface SignalsJune 2012 Altera Corporation Interlaken MegaCore FunctionUser Gui

Seite 52

5–4 Chapter 5: SignalsInterlaken MegaCore Function Reset SignalsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideInterlaken MegaCore

Seite 53 - 5. Signals

Chapter 5: Signals 5–5Application Interface SignalsJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideApplication Interface SignalsThe

Seite 54 - Exclude transceivers

5–6 Chapter 5: SignalsApplication Interface SignalsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideTX Application Interface Signals

Seite 55 - Chapter 5: Signals 5–3

Chapter 5: Signals 5–7Application Interface SignalsJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideTable 5–8. TX Application Interf

Seite 56 - Note to Table 5–3:

vi ContentsInterlaken MegaCore Function June 2012 Altera CorporationUser Guide

Seite 57 - Application Interface Signals

5–8 Chapter 5: SignalsOut-of-Band Flow Control Interface SignalsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideOut-of-Band Flow Co

Seite 58 - Note to Table 5–6:

Chapter 5: Signals 5–9Out-of-Band Flow Control Interface SignalsJune 2012 Altera Corporation Interlaken MegaCore FunctionUser Guiderx_oob_in_fc_dataIn

Seite 59 - Chapter 5: Signals 5–7

5–10 Chapter 5: SignalsOut-of-Band Flow Control Interface SignalsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideTX Out-of-Band Flo

Seite 60 - Note to Table 5–8:

June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide6. Qsys Design ExamplesDesign Examples OverviewThe Interlaken MegaCore function inc

Seite 61 - Note to Table 5–10:

6–2 Chapter 6: Qsys Design ExamplesInterlaken Sample Channel Client ComponentInterlaken MegaCore Function June 2012 Altera CorporationUser Guidef For

Seite 62 - Note to Table 5–12:

Chapter 6: Qsys Design Examples 6–3Design Example Simulation SequenceJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideThe Interlaken

Seite 63 - Transceiver Banks

6–4 Chapter 6: Qsys Design ExamplesRunning a Design ExampleInterlaken MegaCore Function June 2012 Altera CorporationUser GuideSetting Up the Design Ex

Seite 64

Chapter 6: Qsys Design Examples 6–5Running a Design ExampleJune 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide2. Change directory to t

Seite 65 - Running a Design Example

6–6 Chapter 6: Qsys Design ExamplesRunning a Design ExampleInterlaken MegaCore Function June 2012 Altera CorporationUser Guide

Seite 66 - Setting Up the Design Example

June 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideA. Initializing the Interlaken MegaCoreFunctionThis appendix describes a basic rese

Seite 67

June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide1. About This MegaCore FunctionInterlaken is a high-speed serial communication prot

Seite 68

A–2 Appendix A: Initializing the Interlaken MegaCore FunctionTroubleshooting an Interlaken LinkInterlaken MegaCore Function June 2012 Altera Corporati

Seite 69 - Function

Appendix A: Initializing the Interlaken MegaCore Function A–3Troubleshooting an Interlaken LinkJune 2012 Altera Corporation Interlaken MegaCore Functi

Seite 70

A–4 Appendix A: Initializing the Interlaken MegaCore FunctionTroubleshooting an Interlaken LinkInterlaken MegaCore Function June 2012 Altera Corporati

Seite 71

June 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideB. Excluding Transceivers for FasterSimulationThe external transceiver interface is

Seite 72

B–2 Appendix B: Excluding Transceivers for Faster SimulationExternal Transceiver Interface ClocksInterlaken MegaCore Function June 2012 Altera Corpora

Seite 73 - Simulation

Appendix B: Excluding Transceivers for Faster Simulation B–3External Transceiver Interface ClocksJune 2012 Altera Corporation Interlaken MegaCore Func

Seite 74

B–4 Appendix B: Excluding Transceivers for Faster SimulationExternal Transceiver Interface ClocksInterlaken MegaCore Function June 2012 Altera Corpora

Seite 75

Appendix B: Excluding Transceivers for Faster Simulation B–5External Transceiver Interface Data and Clock SignalsJune 2012 Altera Corporation Interlak

Seite 76

B–6 Appendix B: Excluding Transceivers for Faster SimulationReset in Interlaken MegaCore Functions Without TransceiversInterlaken MegaCore Function Ju

Seite 77

Appendix B: Excluding Transceivers for Faster Simulation B–7Reset in Interlaken MegaCore Functions Without TransceiversJune 2012 Altera Corporation In

Seite 78

1–2 Chapter 1: About This MegaCore FunctionDevice Family SupportInterlaken MegaCore Function June 2012 Altera CorporationUser Guide Supports fast sim

Seite 79 - Reset Signals

B–8 Appendix B: Excluding Transceivers for Faster SimulationReset in Interlaken MegaCore Functions Without TransceiversInterlaken MegaCore Function Ju

Seite 80 - Required Reset Sequence

June 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideC. Closing Timing on 10- and 20-laneDesignsI/O timing is critical for Interlaken Me

Seite 81

C–2 Appendix C: Closing Timing on 10- and 20-lane DesignsInterlaken MegaCore Function June 2012 Altera CorporationUser Guide6. To set the parameters o

Seite 82

Appendix C: Closing Timing on 10- and 20-lane Designs C–3June 2012 Altera Corporation Interlaken MegaCore FunctionUser Guide9. You must ensure that al

Seite 83

C–4 Appendix C: Closing Timing on 10- and 20-lane DesignsInterlaken MegaCore Function June 2012 Altera CorporationUser Guideset_instance_assignment -n

Seite 84

June 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideD. Porting an Interlaken Design from thePrevious Version of the SoftwareThis append

Seite 85

D–2 Appendix D: Porting an Interlaken Design from the Previous Version of the SoftwareInterlaken MegaCore Function June 2012 Altera CorporationUser Gu

Seite 86

June 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideAdditional InformationThis chapter provides additional information about the docume

Seite 87 - Additional Information

Info–2 Additional InformationTypographic ConventionsInterlaken MegaCore Function June 2012 Altera CorporationUser GuideTypographic ConventionsThe foll

Seite 88 - Typographic Conventions

Additional Information Info–3Typographic ConventionsJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideThe envelope links to the Email

Seite 89 - Visual Cue Meaning

Chapter 1: About This MegaCore Function 1–3MegaCore VerificationJune 2012 Altera Corporation Interlaken MegaCore FunctionUser GuideTable 1–3 shows the

Seite 90 - Info–4 Additional Information

Info–4 Additional InformationTypographic ConventionsInterlaken MegaCore Function June 2012 Altera CorporationUser Guide

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