Altera Mentor Verification IP Altera Edition AMBA AXI4-Li Bedienungsanleitung PDF herunterladen (Seite 52)

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Mentor Verification IP AE AXI4-Lite User Guide, V10.3

SystemVerilog Master BFM

execute_write_data_phase()

April 2014

execute_write_data_phase()

This task executes a write data phase (beat) previously created by the

create_write_transaction() task. This phase can be blocking (default) or nonblocking, defined

by the transaction record operation_mode field.

The execute_write_data_phase() sets the WVALID protocol signal at the appropriate time

defined by the transaction record data_valid_delay field.

Example

// Declare a local variable to hold the transaction record.

axi4lite_transaction write_trans;

// Create a write transaction with start address of 0 and assign

// it to the local write_trans variable.

write_trans = bfm.create_write_transaction(0);

....

// Execute the write data phase for the write_trans transaction.

bfm.execute_write_data_phase(write_trans, 0, last); //Note array element 0

Prototype

task automatic execute_write_data_phase

(

axi4_transaction trans

int index = 0, // Optional

output bit last

);

Arguments

trans The axi4_transaction record.

index Data phase (beat) number.

Note: ‘0’ for AXI4-Lite

last Flag to indicate that this phase is the last beat of data.

Returns

None

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