Altera Mentor Verification IP Altera Edition AMBA AXI4-Li Bedienungsanleitung Seite 360
- Seite / 413
- Inhaltsverzeichnis
- LESEZEICHEN
Bewertet. / 5. Basierend auf Kundenbewertungen
Mentor Verification IP AE AXI4-Lite User Guide, V10.3
360
Getting Started with Qsys and the BFMs
Setting Up Simulation from the Windows GUI
April 2014
• “ModelSim Simulation” on page 360
• “Questa Simulation” on page 364
• “Cadence IES Simulation” on page 364
• “Synopsys VCS Simulation” on page 366
For each simulator, a README text file and a command script file is provided in the installed
Mentor VIP AE directory location axi4lite/qsys-examples/ex1_back_to_back_sv.
Table 12-1 details the README text file instructions to load a model into the simulator, and the
script command file to start the simulation.
Note
The VHDL example axi4lite/qsys-examples/ex1_back_to_back_vhd has equivalent
README text files and command script files. The process to follow for VHDL
simulation is similar to that for SystemVerilog simulation.
ModelSim Simulation
You can run a ModelSim simulation from a GUI interface or a command line. Before starting a
simulation, you must do the following:
• Check that the $QUARTUS_ROOTDIR environment variable points to the Quartus II
software directory in the Quartus II software installation. The example command script
example.do requires this variable to locate the installed Mentor VIP AE BFMs during
simulation.
• Ensure that the environment variable MvcHome points to the location of the installed
Mentor VIP AE BFM. You can set the location of MvcHome using one of the following
options:
o To set the MvcHome variable in the modelsim.ini file, refer to “Editing the
modelsim.ini File” on page 363.”
o To specify the -mvchome option on the command line, refer to “Starting a
Simulation from a UNIX Command Line” on page 362.”
Table 12-1. SystemVerilog README Files and Script Names for all Simulators
Questa
Simulation
ModelSim
Simulation
IES
Simulation
VCS
Simulation
README README-
Questa.txt
README-
ModelSim.txt
README-
IUS.txt
README-
VCS.txt
Script File example.do example.do example-ius.sh example-vcs.sh
- AMBA AXI4-Lite 1
- User Guide 1
- Table of Contents 10
- List of Examples 12
- List of Figures 14
- List of Tables 15
- About This User Guide 17
- Protocol Restrictions 17
- Supported Simulators 18
- Simulator GCC Requirements 18
- Chapter 1 21
- Mentor VIP Altera Edition 21
- What Is a Transaction? 22
- AXI4-Lite Transactions 22
- Chapter 2 27
- SystemVerilog API Overview 27
- Chapter 3 39
- SystemVerilog Master BFM 39
- SystemVerilog Master API 43
- Returns 44
- Example 58
- Chapter 4 63
- SystemVerilog Slave BFM 63
- SystemVerilog Slave API 68
- Arguments config_name 69
- Chapter 5 91
- SystemVerilog Monitor API 96
- Prototype 100
- Arguments 100
- April 2014 102
- SystemVerilog Monitor BFM 105
- Helper Functions 111
- SystemVerilog Tutorials 115
- Chapter 6 115
- BFM Master Test Program 116
- Verifying a Slave DUT 117
- Verifying a Master DUT 123
- Basic Slave API Definition 124
- *_valid_delay = 4 127
- *_ready_delay = 2 127
- Advanced Slave API Definition 129
- Initial Block 131
- Chapter 7 137
- VHDL API Overview 137
- Test Program VHDL 138
- Configuration 139
- Creating Transactions 139
- Transaction Definition 140
- Executing Transactions 144
- Waiting Events 145
- Access Transaction Record 146
- Operation Mode 147
- Channel Handshake Delay 147
- Handshake Delay 148
- Transaction Done 149
- Chapter 8 151
- VHDL Master BFM 151
- Master BFM Protocol Support 152
- Master Timing and Events 152
- Master BFM Configuration 152
- Master Assertions 155
- VHDL Master API 156
- Chapter 9 213
- VHDL Slave BFM 213
- Slave BFM Configuration 214
- Slave Assertions 216
- VHDL Slave API 217
- Operational 223
- Transaction 223
- Chapter 10 279
- VHDL Monitor BFM 279
- Monitor BFM Configuration 280
- Monitor Assertions 282
- VHDL Monitor API 283
- Chapter 11 335
- VHDL Tutorials 335
- BFM Slave Test Program 341
- Chapter 12 353
- Running the Qsys Tool 356
- Running a Simulation 359
- ModelSim Simulation 360
- Editing the modelsim.ini File 363
- Questa Simulation 364
- Cadence IES Simulation 364
- Synopsys VCS Simulation 366
- Appendix A 369
- AXI4-Lite Assertions 384
- Appendix B 385
- SystemVerilog Test Programs 385
- Appendix C 397
- VHDL Test Programs 397
- End-User License Agreement 409
Verwandte Produkte und Handbücher für Messgeräte Altera Mentor Verification IP Altera Edition AMBA AXI4-Li
Messgeräte Altera Mentor Verification IP Altera Edition AMBA AXI4-St Bedienungsanleitung
(231 Seiten)
(231 Seiten)
Messgeräte Altera Nios II Bedienungsanleitung
(22 Seiten)
(22 Seiten)
Messgeräte Altera Nios II Bedienungsanleitung
(22 Seiten)
(22 Seiten)
Messgeräte Altera Mentor Verification IP Altera Edition AMBA AXI3/4T Bedienungsanleitung
(783 Seiten)
(783 Seiten)
Messgeräte Altera PCI Development Kit, Cyclone II Edition Getting St Bedienungsanleitung
(40 Seiten)
(40 Seiten)
Messgeräte Altera PCI Express Development Kit, Stratix II GX Edition Bedienungsanleitung
(36 Seiten)
(36 Seiten)
Messgeräte Altera PCI Compiler Bedienungsanleitung
(360 Seiten)
(360 Seiten)
© 2020, manymanuals.de. Alle Rechte vorbehalten. | 0.045 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Kommentare zu diesen Handbüchern