
Option Legal Values Description
What clocking method would you like to
use?
When you select With one
read port and one write port,
the following values are
available:
• Single clock
• Dual clock: use separate
‘input’ and ‘output’ clocks
• Dual clock: use separate
‘read’ and ‘write’ clocks
When you select With two
read/write ports, the
following options are
available:
• Single clock
• Dual clock: use separate
‘input’ and ‘output’ clocks
• Dual clock: use separate
clocks for A and B ports
Specifies the clocking
method to use.
• Single clock—A single
clock and a clock enable
controls all registers of
the memory block.
• Dual Clock: use separate
‘input’ and ‘output’
clocks—An input and an
output clock controls all
registers related to the
data input and output to/
from the memory block
including data, address,
byte enables, read
enables, and write
enables.
• Dual clock: use separate
‘read’ and ‘write’ clocks—
A write clock controls the
data-input, write-address,
and write-enable registers
while the read clock
controls the data-output,
read-address, and read-
enable registers.
• Dual clock: use separate
clocks for A and B ports
—Clock A controls all
registers on the port A
side; clock B controls all
registers on the port B
side. Each port also
supports independent
clock enables for both
port A and port B
registers, respectively.
Create a ‘rden’ read enable signal
On/Off Available when you select
With one read port and one
write port option.
Create a ‘rden_a’ and ‘rden_b’ read enable
signal
On/Off
• Available when you select
With two read/write
ports option.
• Specifies whether to
create a read enable
signal for Port A and B.
5-12
RAM: 2-Port IP Core Parameters for MAX 10 Devices
UG-M10MEMORY
2015.05.04
Altera Corporation
RAM: 2-PORT IP Core References
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