Altera Stratix V Avalon-ST Bedienungsanleitung Seite 54
- Seite / 158
- Inhaltsverzeichnis
- LESEZEICHEN
Bewertet. / 5. Basierend auf Kundenbewertungen
Figure 4-3: Timing Diagram for MSI-X Interrupt Generation
pld_clk
MSI-X Function No
MSI-X Address
MSI-X TC
app_msix_req
app_msi_req_fn[7:0]
app_msix_addr[63:0]
app_msi_tc[2:0]
app_msix_ack
MSI-X Data
app_msix_data[31:0]
app_msi_status[1:0]
Table 4-10: Legacy Interrupts
Signal Direction Description
app_int_sts_a Input The Application Layer uses this signal to generate a legacy
INT<x>interrupt. <x> corresponds to a-d for functions
programmed to use interrupt pins a-d. The Hard IP sends an
INTx_Assert message upstream to the Root Complex in
response to a low-to- high transition. The Hard IP sends a INTX_
Deassert in response to a high-to-low transition. The INTX_
Deassert message is only sent if a previous INTx_Assert
message was sent. Figure 4-4 and Figure 4-5 for timing
diagrams.
This input has no effect if the INT<x>Disable bit in the PCI
Command Register of the interrupting function is set to 1.
app_int_sts_b Input
app_int_sts_c Input
app_int_sts_d Input
app_int_ack Output A pulse on this output indicates that an INTx_Assert or INTX_
Deassert message has been sent. Assertion is in response to a
transition on aapp_int_sts_<x> input. This signal is asserted for
at least 1 cycle when an INTx_Assert message TLP has been
transmitted. It is asserted when either of the following occurs:
• A low-to-high transition on one of the app_int_sts_<x>
inputs
• A INTX_Deassert message TLP has been transmitted in
response to a high-to-low transition
The Application Layer must wait for app_int_ack the after
making a transition on one of theapp_int_sts_<x> inputs,
before signaling a new transition.
UG-01097_sriov
2014.12.15
Interrupt Interface
4-19
Interfaces and Signal Descriptions
Altera Corporation
Send Feedback
- User Guide 1
- Datasheet 2
- Features 3
- Interface 4
- Release Information 7
- Device Family Support 7
- Example Designs 8
- Debug Features 8
- IP Core Verification 9
- Recommended Speed Grades 10
- Related Information 11
- Subscribe 12
- Qsys Subsystem Description 13
- Parameter Value 15
- Directory Description 16
- Parameter Settings 21
- Parameter Value Description 22
- SR-IOV System Settings 24
- Interrupt Capabilities 27
- Device Capabilities 29
- Error Reporting 30
- Link Capabilities 31
- Slot Capabilities 32
- Power Management 33
- PHY Characteristics 34
- Simulation Options 35
- Avalon-ST TX Interface 37
- Signal Direction Description 38
- Avalon‑ST RX Interface 40
- BAR Hit Signals 43
- Completion Side Band Signals 45
- Signal Directi 46
- Description 46
- Clock Signals 48
- Interrupt Interface 49
- Implementing MSI-X Interrupts 55
- LMI Signals 57
- Serial Data Signals 65
- Test Signals 70
- PIPE Interface Signals 71
- Byte Address 77
- MSI Registers 80
- MSI-X Capability Structure 82
- VF Device ID Register 96
- Page Size Registers 96
- Lane Error Status Register 98
- Bits Register Description 99
- Default Value 99
- Altera Corporation 100
- Registers 100
- Send Feedback 100
- Virtual Function Registers 102
- Name Description 103
- Reset and Clocks 107
- Hard IP for PCI Express 108
- Example Design 108
- UG-01097_sriov 109
- 2014.12.15 109
- Function Level Reset (FLR) 111
- Clock Domains 111
- Clock Summary 114
- Interrupts 115
- Error Handling 118
- Physical Layer Errors 119
- Data Link Layer Errors 119
- Transaction Layer Errors 120
- Error Type Description 121
- Status Bit Conditions 123
- IP Core Architecture 125
- Top-Level Interfaces 126
- Clocks and Reset 126
- Transceiver Reconfiguration 126
- Data Link Layer 127
- Physical Layer 129
- TX Packets 130
- Design Implementation 136
- CONF_DONE 137
- Endpoint Reset 137
- Root Port Reset 137
- SDC Timing Constraints 138
- Debugging 143
- Setting Up Simulation 146
- Use Third-Party PCIe Analyzer 148
- BIOS Enumeration Issues 148
- Address[31:2] 149
- Figure A-6: I/O Read Request 151
- Additional Information 155
- Typographic Conventions 156
- Visual Cue Meaning 157
Verwandte Produkte und Handbücher für Messgeräte Altera Stratix V Avalon-ST
Messgeräte Altera SDI HSMC Bedienungsanleitung
(36 Seiten)
(36 Seiten)
© 2020, manymanuals.de. Alle Rechte vorbehalten. | 0.050 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Kommentare zu diesen Handbüchern