Altera Integer Arithmetic IP Bedienungsanleitung PDF herunterladen (Seite 106)

Figure 9-3: Pre-adder Coefficient Mode

Mult0

result

coef

+/-

Preadder

coefsel0

Pre-adder Input Mode

In this mode, one multiplier operand derives from the pre-adder, and the other operand derives from the

datac[] input port.

The following settings are applied in this mode:

• The width of the dataa[] input (WIDTH_A) must be less than or equals to 25 bits

• The width of the datab[] input (WIDTH_B) must be less than or equals to 25 bits

• The width of the datac[] input (WIDTH_C) must be less than or equals to 22 bits

• The number of multipliers must be set to 1

• All input registers must be registered with the same clock

This mode is expressed in the following equation.

The following shows the pre-adder input mode of a multiplier.

Figure 9-4: Pre-adder Input Mode

Mult0

result

+/-

Pre-adder Square Mode

In this mode, both multiplier operands derive from the pre-adder.

The following settings are applied in this mode:

• The width of the dataa[] input (WIDTH_A) must be less than or equals to 17 bits

• The width of the datab[] input (WIDTH_B) must be less than or equals to 17 bits

• The number of multipliers must be set to 2

UG-01063

2014.12.19

Pre-adder Input Mode

9-5

ALTMULT_ADD (Multiply-Adder)

Altera Corporation

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Altera Integer Arithmetic IP Bedienungsanleitung Seite 106