Altera Cyclone V GX FPGA Development Board Bedienungsanleitung PDF herunterladen (Seite 6)

1–2 Chapter 1: Overview

Board Component Blocks

Cyclone V GX FPGA Development Board May 2013 Altera Corporation

Reference Manual

Board Component Blocks

The development board features the following major component blocks:

■ One Cyclone V GX FPGA (5CGXFC7D6F31C7NES) in a 896-pin FineLine BGA

(FBGA) package

■ 150,000 LEs

■ 136,880 adaptive logic modules (ALMs)

■ 7,024 Kbit (Kb) on-die block memory

■ Nine 3.125-Gbps high-speed transceivers

■ Seven fractional phase locked loops (PLLs)

■ 312 18x18-bit multipliers

■ 480 general purpose input/output (GPIO)

■ 1.1-V core voltage

■ FPGA configuration circuitry

■ MAX

V CPLD (5M2210ZF256C4N) in a 256-pin FBGA package as the System

Controller

■ Flash fast passive parallel (FPP) configuration

■ MAX II CPLD (EPM240M100C4N) in a 100-pin FBGA package as part of the

embedded USB-Blaster

II for use with the Quartus

II Programmer

■ Clocking circuitry

■ Programmable clock generator for the FPGA reference clock input

■ 125-MHz LVDS oscillator for the FPGA reference clock input

■ 148.5/148.35-MHz LVDS VCXO for the FPGA reference clock input

■ 50-MHz single-ended oscillator for the FPGA and MAX V CPLD clock input

■ 100-MHz single-ended oscillator for the MAX V CPLD configuration clock

input

■ SMA input (LVPECL)

■ Memory

■ DDR3 SDRAM

■ Four 128-Mbyte (MB) device with a 16-bit data bus

■ Two 128-MB device with a 8-bit data bus

■ One 18-MB SSRAM

■ One 512-MB synchronous flash

1 2 3 4 5 6 7 8 9 10 11 ... 59 60

Keine Kommentare

Altera Cyclone V GX FPGA Development Board Bedienungsanleitung Seite 6