
Chapter 2: Board Components 2–29
Components and Interfaces
May 2013 Altera Corporation Cyclone V GX FPGA Development Board
Reference Manual
25
HSMA_TX_P1
P4 1.5-V PCML Transceiver TX bit 1
26
HSMA_RX_P1
R2 1.5-V PCML Transceiver RX bit 1
27
HSMA_TX_N1
P3 1.5-V PCML Transceiver TX bit 1n
28
HSMA_RX_N1
R1 1.5-V PCML Transceiver RX bit 1n
29
HSMA_TX_P0
T4 1.5-V PCML Transceiver TX bit 0
30
HSMA_RX_P0
U2 1.5-V PCML Transceiver RX bit 0
31
HSMA_TX_N0
T3 1.5-V PCML Transceiver TX bit 0n
32
HSMA_RX_N0
U1 1.5-V PCML Transceiver RX bit 0n
33
HSMA_SDA
H14 2.5-V CMOS Management serial data
34
HSMA_SCL
J14 2.5-V CMOS Management serial clock
35
JTAG_TCK
AC7 2.5-V CMOS JTAG clock signal
36
HSMA_JTAG_TMS
— 2.5-V CMOS JTAG mode select signal
37
HSMA_JTAG_TDO
— 2.5-V CMOS JTAG data output
38
JTAG_FPGA_TDO_RETIMER
— 2.5-V CMOS JTAG data input
39
HSMA_CLK_OUT0
J19 2.5-V CMOS Dedicated CMOS clock out
40
HSMA_CLK_IN0
L15 2.5-V CMOS Dedicated CMOS clock in
41
HSMA_D0
K16 2.5-V CMOS Dedicated CMOS I/O bit 0
42
HSMA_D1
L18 2.5-V CMOS Dedicated CMOS I/O bit 1
43
HSMA_D2
K18 2.5-V CMOS Dedicated CMOS I/O bit 2
44
HSMA_D3
K17 2.5-V CMOS Dedicated CMOS I/O bit 3
47
HSMA_TX_D_P0
D12 LVDS or 2.5-V LVDS TX bit 0 or CMOS bit 4
48
HSMA_RX_D_P0
E11 LVDS or 2.5-V LVDS RX bit 0 or CMOS bit 5
49
HSMA_TX_D_N0
C12 LVDS or 2.5-V LVDS TX bit 0n or CMOS bit 6
50
HSMA_RX_D_N0
D10 LVDS or 2.5-V LVDS RX bit 0n or CMOS bit 7
53
HSMA_TX_D_P1
D14 LVDS or 2.5-V LVDS TX bit 1 or CMOS bit 8
54
HSMA_RX_D_P1
H12 LVDS or 2.5-V LVDS RX bit 1 or CMOS bit 9
55
HSMA_TX_D_N1
C14 LVDS or 2.5-V LVDS TX bit 1n or CMOS bit 10
56
HSMA_RX_D_N1
G12 LVDS or 2.5-V LVDS RX bit 1n or CMOS bit 11
59
HSMA_TX_D_P2
B13 LVDS or 2.5-V LVDS TX bit 2 or CMOS bit 12
60
HSMA_RX_D_P2
E12 LVDS or 2.5-V LVDS RX bit 2 or CMOS bit 13
61
HSMA_TX_D_N2
A13 LVDS or 2.5-V LVDS TX bit 2n or CMOS bit 14
62
HSMA_RX_D_N2
D13 LVDS or 2.5-V LVDS RX bit 2n or CMOS bit 15
65
HSMA_TX_D_P3
B14 LVDS or 2.5-V LVDS TX bit 3 or CMOS bit 16
66
HSMA_RX_D_P3
G14 LVDS or 2.5-V LVDS RX bit 3 or CMOS bit 17
67
HSMA_TX_D_N3
A14 LVDS or 2.5-V LVDS TX bit 3n or CMOS bit 18
68
HSMA_RX_D_N3
F14 LVDS or 2.5-V LVDS RX bit 3n or CMOS bit 19
71
HSMA_TX_D_P4
A16 LVDS or 2.5-V LVDS TX bit 4 or CMOS bit 20
72
HSMA_RX_D_P4
F15 LVDS or 2.5-V LVDS RX bit 4 or CMOS bit 21
73
HSMA_TX_D_N4
A15 LVDS or 2.5-V LVDS TX bit 4n or CMOS bit 22
Table 2–24. HSMC Interface Pin Assignments, Schematic Signal Names, and Functions (Part 2 of 4)
Board
Reference (J1)
Schematic Signal Name
Cyclone V GX
Pin Number
I/O Standard Description
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