Altera Cyclone V GX FPGA Development Board Bedienungsanleitung PDF herunterladen (Seite 28)

2–20 Chapter 2: Board Components

General User Input/Output

Cyclone V GX FPGA Development Board May 2013 Altera Corporation

Reference Manual

Table 2–13 lists the clock outputs for the development board.

General User Input/Output

This section describes the user I/O interface to the FPGA, including the push buttons,

DIP switches, LEDs, and character LCD.

User-Defined Push Buttons

The development board includes three user-defined push buttons. For information on

the system and safe reset push buttons, refer to “Setup Elements” on page 2–16.

Board references S3, S4, and S5 are push buttons for controlling the FPGA designs that

loads into the Cyclone V GX device. When you press and hold down the switch, the

device pin is set to logic 0; when you release the switch, the device pin is set to logic 1.

There are no board-specific functions for these general user push buttons.

Table 2–14 lists the user-defined push button schematic signal names and their

corresponding Cyclone V GX device pin numbers.

User-Defined DIP Switch

Board reference SW2 is a four-pin DIP switch. This switch is user-defined and

provides additional FPGA input control. When the switch is in the OFF position, a

logic 1 is selected. When the switch is in the ON position, a logic 0 is selected. There

are no board-specific functions for this switch.

Table 2–13. Off-Board Clock Outputs

Source

Schematic Signal

Name

I/O Standard

Cyclone V GX

Pin Number

Description

Samtec HSMC

HSMA_CLK_OUT0

2.5V CMOS J19 FPGA CMOS output (or GPIO)

Samtec HSMC

HSMA_CLK_OUT_P1

LVDS/2.5V CMOS B26

LVDS output. Can also support 2x CMOS

outputs.

HSMA_CLK_OUT_N1

LVDS/2.5V CMOS A26

Samtec HSMC

HSMA_CLK_OUT_P2

LVDS/2.5V CMOS A25

LVDS output. Can also support 2x CMOS

outputs.

HSMA_CLK_OUT_N2

LVDS/2.5V CMOS A24

SMA

CLKOUT_SMA

2.5V CMOS F9 FPGA CMOS output (or GPIO)

Table 2–14. User-Defined Push Button Schematic Signal Names and Functions

Board Reference

Schematic Signal

Name

Cyclone V GX Pin

Number

I/O Standard Description

USER_PB0

AF29 1.5-V

User-defined push buttonsS4

USER_PB1

AF30 1.5-V

USER_PB2

AE28 1.5-V

1 2 ... 23 24 25 26 27 28 29 30 31 32 33 ... 59 60

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