Altera PCI Development Kit, Cyclone II Edition Getting St Bedienungsanleitung PDF herunterladen (Seite 30)

2–20 Core Version a.b.c variable Altera Corporation

PCI Development Kit, Cyclone II Edition Getting Started User Guide May 2005

Using the Board as a Prototyping Platform

Table 2–3 describes the simulation files used in the walkthrough. The files

are located in the <path>\cycloneii_pci_kit-v1.0.0\

reference_design\sim directory.

cnten.vhd

datapath_fifo.vhd

dma.vhd

dma_reg.vhd

dma_sm.vhd

last_gen.vhd

mstr_cntrl.vhd

mstr_fifo_cntrl.vhd

mstr_perf.vhd

targ_cntrl.vhd

targ_fifo_cntrl.vhd

targ_perf.vhd

pci_local These files are the local PCI interface. They implement target and

master state machine data path controllers and FIFO buffers.

fifo_128x32.vhd

fifo_128x4.vd

fifo_128x64.vhd

pci_local The reference design uses library of parameterized module (LPM)

functions, which are generated using the Quartus II software. For more

information on generating LPM functions, refer to Quartus II Help.

ddr_top.vhd ddr_cntrl This wrapper file implements the DDR2 SDRAM Controller Compiler.

The file is generated with the DDR2 SDRAM Controller.

Refer to the DDR & DDR2 SDRAM Controller Compiler User Guide for

instructions on how to use the wizard.

ddr_intf.vhd ddr_intf The top level of the PCI-DDR2 SDRAM interface.

adr_gen.vhd

clk_sync.vhd

cntrl_intf.vhd

mr_sm.vhd

mw_sm.vhd

tr_sm.vhd

tw_sm.vhd

ddr_intf These files are the PCI-DDR2 SDRAM interface. They implement

target and master state machines, address logic, and clock

synchronizers.

Note to Ta bl e 2 –2 :

(1) Indicates the subdirectory of the <path>\cycloneii_pci_kit_v-1.0.0\reference_design\vhdl directory.

Table 2–2. Prototyping Walkthrough Reference Design Source Files (Part 2 of 2)

File

Subdirectory

(1)

Description

Table 2–3. Prototyping Walkthrough Simulation Files

File

Subdirectory

(1)

Description

modelsim.ini — The ModelSim initialization settings.

sim.do

—

The ModelSim simulation script.

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