Altera CRC Compiler Bedienungsanleitung PDF herunterladen (Seite 7)

Chapter 1: About This Compiler 1–3

General Description

Preliminary

General Description

The CRC Compiler generates high-performance circuits to generate or check Cyclic

Redundancy Check (CRC) checksums for packet-based communication.

The CRC generator uses an Avalon-ST

interface to receive data and emits generated

checksums on a dedicated output. The CRC checker similarly uses an Avalon-ST

interface to receive a packet with a CRC checksum and uses a dedicated output to

indicate if the checksum is correct. The CRC generator and checker MegaCore

functions do not store any data, checksums, or status.

CRC MegaCore Function Verification

Before releasing the CRC Compiler, Altera runs comprehensive regression tests to

verify the quality and correctness of the CRC Compiler.

Custom variations generated by the CRC Compiler exercise the CRC compiler’s

various parameter options. The resulting simulation models are thoroughly

simulated, and the results are verified against bit-accurate master simulation models.

Performance and Resource Utilization

Parameterization allows you to generate the most efficient implementation that meets

your design functionality, size, and performance goals.

The section lists the performance and resource utilization for several sample

implementations in different device families. The performance metrics were

generated using the Quartus

II software version 8.0 and the TimeQuest timing

analyzer, with the fastest speed grade selected for the device family. Neither the

generator nor checker MegaCore function uses any memory.

Table 1–3 shows the typical expected performance and resource utilization for

Cyclone II, Cyclone III, and Stratix GX devices.

Table 1–3. Performance and Resource Utilization for Cyclone II, Cyclone III and Stratix GX

Device and

Speed Grade

MegaCore

Function Parameter Settings (1)

Logic

Elements

max

MHz

Throughput

Gbps

Cyclone II

-6

CRC generator 8-bit datapath

1 symbol per word

Inputs and outputs not registered

CRC-16-CCITT

Optimize for area

34 420.17 3.36

Cyclone III

-6

CRC generator 34 450.05 3.6

Stratix GX

-5

CRC checker 16-bit datapath

2 symbols per word

CRC-16-ANSI

Optimize for speed

147 277 4.4

Note to Table 1–3:

(1) Parameters set to their default values are not mentioned.

1 2 3 4 5 6 7 8 9 10 11 12 ... 29 30

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