Altera Arria II GX FPGA Development Board Bedienungsanleitung Seite 21

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Chapter 2: Board Components 2–13
Configuration, Status, and Setup Elements
February 2011 Altera Corporation Arria II GX FPGA Development Board Reference Manual
Figure 2–4 illustrates the JTAG chain.
Each jumper shown in Figure 2–4 is located in the JTAG chain header (J9) on the front
of the board. To connect a device or interface in the chain, remove the corresponding
shunt from the jumper. Install a shunt on each of the four jumper positions to only
have the FPGA in the chain.
The MAX
II CPLD EPM2210 System Controller must be in the chain to use some of the
GUI interfaces. For this setting, remove the left-most jumper shunt from the JTAG
chain header (J9).
Flash Memory Programming
Flash memory programming is possible through a variety of methods using the Arria
II GX device.
Figure 2–4. JTAG Chain
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