Altera Virtual JTAG IP Core Bedienungsanleitung PDF herunterladen (Seite 8)

Figure 5: Extension of the JTAG Protocol for PLD Applications

IR Shift Registers

IR Update Registers

DR Shift Register 1

DR Update Register 1

USER 0 Data Registers

USER 1 Data Registers

TDI TDO

TAP

Controller

Output

TAP

Controller

Output

Altera PLD JTAG Extension

Node 1

Node N

USER0 / USER1 and

SLD_HUB Control Signals

TDI TDO

VIR

VDR 1

VDR N

VIR

VIR 1

VIR N

SLD Hub Finite State Machine

The SLD hub decodes TMS independently from the hard JTAG TAP controller state machine and implements

an equivalent state machine (called the “SLD hub finite state machine”) for the internal JTAG path. The SLD

hub performs a similar function for the VIR and VDR chains that the TAP controller performs for the JTAG

IR and DR chains. It enables an SLD node as the active path for the TDI pin, selects the TDI data between

the VIR and VDR registers, controls the start and stop of any shift transactions, and controls the data flow

between the parallel hold registers and the parallel shift registers of the VIR and VDR.

Because all shifts to VIR and VDR are encapsulated within a DR shift transaction, an additional control

signal is necessary to select between the VIR and VDR data paths. The SLD hub uses the USER1 command

to select the VIR data path and the USER0 command to select the VDR data path.

Virtual JTAG Megafunction (sld_virtual_jtag)

Altera Corporation

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SLD Hub Finite State Machine

2014.03.19

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Altera Virtual JTAG IP Core Bedienungsanleitung Seite 8