Altera Stratix V GX FPGA Development Board Bedienungsanleitung PDF herunterladen (Seite 52)

2–44 Chapter 2: Board Components

Components and Interfaces

Stratix V GX FPGA Development Board October 2014 Altera Corporation

Reference Manual

Table 2–45 shows the cable equalizer lengths.

Figure 2–9 is an excerpt from the LMH0384 cable equalizer data sheet which shows

the SDI cable equalizer.

Table 2–46 summarizes the SDI video input interface pin assignments, signal names,

and functions.

Table 2–45. SDI Cable Equalizer Lengths

Data Rate (Mbps) Cable Type Maximum Cable Length (m)

270

Belden 1694A

400

1485 140

2970 120

Figure 2–9. SDI Cable Equalizer

BYPASS

MUTE

REF

1.0 μF

75 Ω

37.4 Ω

1.0 μF

SDI

SDO

MUTE

REF

BYPASS

AEC+

AEC–

75 Ω

MUTE

Coaxial Cable

SDI Adaptive

Cable Equalizer

To FPGA

3.9 nH

Table 2–46. SDI Video Input Interface Pin Assignments, Schematic Signal Names, and Functions

Board

Reference

(U24)

Schematic

Signal Name

I/O Standard

Stratix V GX FPGA Device

Pin Number

Description

SDI_RX_BYPASS

2.5-V AB30 Equalizer bypass enable

SDI_RX_EN

2.5-V AB28 Device enable

SDI_RX_P

1.4-V PCML F38 SDI video output P

SDI_RX_N

1.4-V PCML F39 SDI video output N

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