Altera JNEye Bedienungsanleitung PDF herunterladen (Seite 168)

Figure 3-16: Transmitter Output TIE (Time Interval Error) Plots with Reference Clock Phase Noise and

Spurs Before and After the Golden CDR

In the following figure, the transmitter output jitter, which includes transmitter intrinsic jitter and PLL

filtered reference clock jitter, is about 0.17 UI at BER 10

-12

Figure 3-17: Transmitter Scope Output Measured with Golden CDR

UG-1146

2015.05.04

Analysis

3-17

Tutorial: PCI Express 8GT

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Altera JNEye Bedienungsanleitung Seite 168