Altera Cyclone IV GX FPGA Development Board Bedienungsanleitung PDF herunterladen (Seite 59)

May 2013 Altera Corporation Cyclone IV GX FPGA Development Board

Reference Manual

Additional Information

This chapter provides additional information about the document and Altera.

Document Revision History

The following table shows the revision history for this document.

How to Contact Altera

To locate the most up-to-date information about Altera products, refer to the

following table.

Date Version Changes

May 2013 1.1

■ Updated Table 2–18—The I/O standard for user push buttons is 1.8-V.

■ Updated the note in Table 2–26—All signals are translated from 1.8-V to 2.5-V using a

dual/quad low-voltage level translators except for

LCD_DATA4

■ Updated Table 2–29—The I/O standard for PCI Express transmit and receive bus is

1.5-V PCML.

■ Updated Table 2–33—HSMA pin J1.44 connects to FPGA pin AD27.

■ Updated the document template.

December 2010 1.0 Initial release.

Contact

(1)

Contact Method Address

Technical support Website www.altera.com/support

Technical training

Website www.altera.com/training

Email custrain@altera.com

Product literature Website www.altera.com/literature

Nontechnical support (general) Email [email protected]

(software licensing) Email [email protected]

Note to Table:

(1) You can also contact your local Altera sales office or sales representative.

1 2 ... 54 55 56 57 58 59 60

Keine Kommentare

Altera Cyclone IV GX FPGA Development Board Bedienungsanleitung Seite 59