Altera Arria V SoC Development Board Bedienungsanleitung PDF herunterladen (Seite 40)

2–32 Chapter 2: Board Components

Components and Interfaces

Arria V SoC Development Board July 2014 Altera Corporation

Reference Manual

D12

FMC_LA_TX_N2

F27 2.5-V CMOS FMC data bus

H14

FMC_LA_TX_N3

P28 2.5-V CMOS FMC data bus

D15

FMC_LA_TX_N4

A27 2.5-V CMOS FMC data bus

H17

FMC_LA_TX_N5

N25 2.5-V CMOS FMC data bus

D18

FMC_LA_TX_N6

L27 2.5-V CMOS FMC data bus

H20

FMC_LA_TX_N7

P21 2.5-V CMOS FMC data bus

H23

FMC_LA_TX_N9

T21 2.5-V CMOS FMC data bus

H26

FMC_LA_TX_N10

A24 2.5-V CMOS FMC data bus

H29

FMC_LA_TX_N12

T22 2.5-V CMOS FMC data bus

D27

FMC_LA_TX_N13

L24 2.5-V CMOS FMC data bus

H35

FMC_LA_TX_N14

H25 2.5-V CMOS FMC data bus

H38

FMC_LA_TX_N15

T24 2.5-V CMOS FMC data bus

G13

FMC_LA_TX_N16

T23 2.5-V CMOS FMC data bus

H32

FMC_LA_TX_N17

K23 2.5-V CMOS FMC data bus

FMC_LA_TX_P0

H27 2.5-V CMOS FMC data bus

H10

FMC_LA_TX_P1

J26 2.5-V CMOS FMC data bus

D11

FMC_LA_TX_P2

E27 2.5-V CMOS FMC data bus

H13

FMC_LA_TX_P3

N28 2.5-V CMOS FMC data bus

D14

FMC_LA_TX_P4

A26 2.5-V CMOS FMC data bus

H16

FMC_LA_TX_P5

M25 2.5-V CMOS FMC data bus

D17

FMC_LA_TX_P6

K27 2.5-V CMOS FMC data bus

H19

FMC_LA_TX_P7

N21 2.5-V CMOS FMC data bus

H22

FMC_LA_TX_P9

R21 2.5-V CMOS FMC data bus

H25

FMC_LA_TX_P10

A23 2.5-V CMOS FMC data bus

H28

FMC_LA_TX_P12

R22 2.5-V CMOS FMC data bus

D26

FMC_LA_TX_P13

K24 2.5-V CMOS FMC data bus

H34

FMC_LA_TX_P14

G25 2.5-V CMOS FMC data bus

H37

FMC_LA_TX_P15

R24 2.5-V CMOS FMC data bus

G12

FMC_LA_TX_P16

R23 2.5-V CMOS FMC data bus

H31

FMC_LA_TX_P17

J23 2.5-V CMOS FMC data bus

FMC_M2C_PG

— 2.5-V CMOS Power good input

FMC_PRSNT

K25 2.5-V CMOS FMC module present

C30

FMC_SCL

J22 2.5-V CMOS Management serial clock line

C31

FMC_SDA

D23 2.5-V CMOS Management serial data line

D29

JTAG_MUX_TCK

AV34 2.5-V CMOS JTAG chain clock

C23

LMK_CLK_FMC_N

— 2.5-V CMOS Alternate mezzanine-bound clock (from LMK device)

C22

LMK_CLK_FMC_P

— 2.5-V CMOS Alternate mezzanine-bound clock (from LMK device)

Table 2–21. FMC Port A Pin Assignments, Schematic Signal Names, and Functions (Part 4 of 5)

Board

Reference

(J26)

Schematic

Signal Name

Arria V SoC

Pin Number

I/O Standard Description

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 69 70

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