Altera Nios Ethernet Spezifikationen PDF herunterladen (Seite 39)

Altera Corporation 1–31

October 2007

Nios II Hardware Development Tutorial Creating the Example Design

Figure 1–16 shows an example of the Settings dialog box assigning a

Cyclone device.

Figure 1–16. Assigning a Device in the Quartus II Settings Dialog Box

To assign the FPGA pin locations, perform the following steps:

1. On the Assignments menu, click Pins. The Quartus II Pin Planner

appears. The Quartus II project has many ready-made assignments

appropriate for a Nios development board, which you must

reassign to suit your board.

2. In the Node Name column, locate PLD_CLOCKINPUT[1]. You

might need to expand the PLD_CLOCKINPUT[1..1] category to

make PLD_CLOCKINPUT[1] visable.

3. In the PLD_CLOCKINPUT[1] row, double-click in the Location

cell. A list of available pin locations appears.

4. Select the appropriate FPGA pin that connects to the oscillator on

the board (see Figure 1–17).

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Altera Nios Ethernet Spezifikationen Seite 39