Altera Stratix II EP2S180 DSP Development Board Bedienungsanleitung PDF herunterladen (Seite 42)

2–34 Core Version a.b.c variable Altera Corporation

Stratix II EP2S180 DSP Development Board Reference Manual

Board Components

■ Pin 41 of CON1 (RESET) is pulled up to 5V through a 10-KΩ resistor,

and is controlled by the EPM7128AE configuration controller. The

FPGA can cause the configuration controller to assert RESET, but the

FPGA does not drive this signal directly.

Table 2–28 provides CompactFlash pin-out details.

Table 2–28. CompactFlash (CON1) Pin Table (Part 1

of 2)

Pin on

CompactFlash

(CON1)

CompactFlash

Function (U60)

Connects to (1)

1GNDGND

2D03AA3

3D04AA1

4D05Y2

5D06W1

6D07V2

7CS0#AE3

8A10AF1

9ATA_SEL#AD12

10 A09 AF3

11 A08 AF4

12 A07 AG1

13 VCC V

(2)

14 A06 AD6

15 A05 AD7

16 A04 AA8

17 A03 AA9

18 A02 AE2

19 A01 AD2

20 A00 AE1

21 DO0 AB3

22 DO1 AB1

23 DO2 Y4

24 IOCS16# AD1

25 CD2# AB8 (3)

26 CD1# AC15

1 2 ... 37 38 39 40 41 42 43 44 45 46 47 ... 57 58

Stratix II EP2S180 1
DSP Development Board 1
Reference Manual 1
Part Number MNL-S20705-1.0 2
Contents 3
About This Manual 5
Visual Cue Meaning 6
1. Introduction 7
Handling the 8
2. Board Components & 9
Environmental Requirements 11
Using the Board 12
Nonvolatile 13
Configuration 13
Nonvolatile Configuration 14
Factory Open Open Open Open 14
The Factory Design 15
Functional 16
Description 16
Stratix II 19
EP2S180F1020C3 19
Components 20
Switch Inputs 21
Configuration Status LEDs 22
A/D Converters 24
D/A Converters 27
Signal Name Stratix II Pin 29
SRAM Memory (U43 & U44) 30
Pin Name Pin Number 31
Flash Memory (U17) 33
SDRAM Memory (U39 and U40) 35
Item Description 38
Ethernet MAC/PHY (U16) 39
CompactFlash Connector (CON1) 41
Mictor Connector (J20) 44
Stratix II Device 45
Mictor Connector 45
VGA Interface (J35) 46
Expansion 48
Interfaces 48
RS-232C Serial I/O Interface 51
Expansion Interfaces 56
Notes to Figure 2–11: 56
Notes to Figure 2–13: 58

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